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| Advance Product Datasheet June 10, 2003 9.9-11.2Gb/s Optical Modulator Driver OC-192 Metro and Long Haul Applications Surface Mount Package TGA4953-EPU Key Features and Performance * * * * * * * Metro MSA Compatible Wide Drive Range (3V to 10V) Single-ended Input / Output Low Power Dissipation (1W at Vo=6V) Very Low Rail Ripple 25 ps Edge Rates (20/80) Small Form Factor - 11.4 x 8.9 x 2 mm - 0.450 x 0.350 x 0.080 inches Evaluation Board Available. * Description The TriQuint TGA4953-EPU is part of a series of surface mount modulator drivers suitable for a variety of driver applications and is compatible with Metro MSA standards. The 4953 consists of two high performance wideband amplifiers combined with off chip circuitry assembled in a surface mount package. A single 4953 placed between the MUX and Optical Modulator provides OEMs with a board level modulator driver surface mount solution. The 4953 provides Metro and Long Haul designers with system critical features such as: low power dissipation (1.1 W at Vo=6 V), very low rail ripple, high voltage drive capability at 5V bias (6 V amplitude adjustable to 3 V), low output jitter (10 ps typical), and low input drive sensitivity (250 mV at Vo=6 V). The 4953 requires external DC blocks, a low frequency choke, and control circuitry. The TGA4953-EPU is available on an evaluation board. Primary Applications * Mach-Zehnder Modulator Driver for Metro and Long Haul. Measured Performance TGA4953 Evaluation Board (Metro MSA Conditions) 10.7 Gb/s, Vplus=5 V, Id=210 mA, (Pdc=1.1 Watt) Vout=6 Vpp, CPC=50%, Vin = 500 mVpp Scale: 2 V/div, 15 ps/div Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 1 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU MAXIMUM RATINGS SYMBOL Vd1, Vd2T Drain Voltage PARAMETER 6/ POSITIVE SUPPLY VOLTAGE VALUE 8V NOTES POSITIVE SUPPLY CURRENT Id1 Id2T Pd Vg1, Vg2 Ig1, Ig2 Vctrl1, Vctrl2 Ictrl1, Ictrl2 PIN VIN TCH TSTG Drain Current Drain Current POWER DISSIPATION NEGATIVE GATE Voltage Gate Current CONTROL GATE Voltage Gate Current RF INPUT Sinusoidal Continuous Wave Power 10.7Gb/s PRBS Input Voltage Peak to Peak OPERATING CHANNEL TEMPERATURE STORAGE TEMPERATURE 23 dBm 4 Vpp 150 0C -40 to 125 C 0 100 mA 300mA 4W 0 V to -3 V 5 mA Vd/2 to -3 V 5 mA 1/ 2/ 3/ 4/ 5/ Notes: 1/ 2/ 3/ 4/ 5/ Assure the combination of Vd and Id does not exceed maximum power dissipation rating. When operated at this bias condition with a base plate temperature of 800C, the median life is reduced. Assure Vctl1 never exceeds Vd1 and assure Vctrl2 never exceeds Vd2 during bias up and down sequences. These ratings apply to each individual FET. Junction operating temperature will directly affect the device median time to failure (MTTF). For maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 6/ These ratings represent the maximum operable values for the device. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 2 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU THERMAL INFORMATION Parameter Test Condition Pdiss (W) .71 TBase (C) 80 TCH (C) 98 RJC (C/W) 26 MTTF (HRS) >1E6 RJC Thermal Resistance (channel to backside of carrier) Vd2T=4.7V, Id2T=150mA +/-5% Notes: 1. Based on a detailed thermal model of the output stage where channel temperature is highest. Assumes worst case power dissipation condition (where no RF is applied at the input (no power is dissipated in the load). 2. Thermal transfer is conducted thru the bottom of the TGA4953EPU package into the motherboard. Design the motherboard to assure adequate thermal transfer to the base plate. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 3 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU RF SPECIFICATIONS (TA = 25C Nominal) NOTE TEST MEASUREMENT CONDITIONS MIN SMALL SIGNAL BW SATURATED POWER BW 1/, 2/ SMALL-SIGNAL GAIN MAGNITUDE 2 and 4 GHz 6 GHz 10 GHz 14 GHz 18 GHz GAIN FLATNESS SMALL SIGNAL AGC RANGE NOISE FIGURE 3/, 4/ EYE AMPLITUDE 500KHz thru 5GHz Midband 3 GHz VD2T=8.0V VD2T=6.5V VD2T=5.5V VD2T=4.5V VD2T=4.0V 5/ 6/, 7/ 1/, 2/ 1/, 2/ ADDITIVE JITTER (rms) SATURATED OUTPUT POWER INPUT RETURN LOSS MAGNITUDE OUTPUT RETURN LOSS MAGNITUDE RISE TIME (20/80) 2, 4, 6, 8, and 10 GHz 2, 4, 6, 10, 14, and 18GHz 2, 4, 6, 10, 14, and 18GHz 25 10 10 15 15 25 30 10 8.0 7.0 6.0 5.5 .5 ps dBm dB dB ps Vpp 30 2.5 30 28 26 19 12 +/-1 dB dB dB dB VALUE TYP 8 12 MAX GHz GHz UNITS Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 4 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU RF SPECIFICATION (Continued) Notes: 1/ Verified at package level RF test. 2/ Package RF Test Bias: Vd=5 V, adjust Vg1 to achieve Id=65 mA then adjust Vg2 to achieve Id=200mA, Vctrl=+0.2 V 3/ Verified by design, SMT assembled onto a demonstration board detailed on sheet 6. 4/ Vin=250mV, Data Rate = 10.7Gb/s, VD1=VD2T or greater, VCTRL2 and VG2 are adjusted for maximum output. 5/ Computed using RSS Method where Jrms_additive = SQRT(Jrms_out2 - Jrms_in2) 6/ Verified at die level on-wafer probe. 7/ Power Bias Die Probe: Vtee=8 V, adjust Vg to achieve Id=175 mA+/-5%, Vctrl=1.5 V Note: At the die level, drain bias is applied thru the RF output port using a bias tee, voltage is at the DC input to the bias tee. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 5 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Demonstration Board DC Block Mother Board DC Block RFin RFout TGA4953 Driver Package Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 6 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Demonstration Board Application Circuit L1 VCTRL1 L2 Note: 1. C3 and C4 extend low frequency performance thru 30 KHz. For applications requiring low frequency performance thru 100 KHz, C3 and C4 may be omitted. 2. C5 is a power supply decoupling capacitor and may be omitted. 3. C6 and C7 are power supply decoupling capacitors and may be omitted when driven directly with an op-amp. Impedance looking into VCTRL1 and VCTRL2 is 10Kohms real. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 7 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Demonstration Board Application Circuit (Continued) Recommended Components: DESIGNATOR C1, C2 C3, C4, C5 C6, C7 C8 L1 L2 R1, R2 DESCRIPTION DC Block, Broadband 10uF Capacitor MLC Ceramic 0.01 uFCapacitor MLC Ceramic 10 uF Capacitor Tantalum 220 uH Inductor 330 nH Inductor 274 Resistor MANUFACTURER Presidio AVX AVX AVX Belfuse Panasonic Panasonic PART NUMBER BB0502X7R104M16VNT9820 0802YC106KAT 0603YC103KAT TAJA106K016R S581-4000-14 ELJ-FAR33MF2 ERJ-2RKF2740X Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 8 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU TGA4953 Typical Performance Data Measured on a Demonstration Board Idd Vdd Id1 Demo-Board Id2T 4953 SMT Driver RF(in) RF(out) Vctrl1 Vg1 Vctrl2 Vg2 Demonstration Board Block Diagram Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 9 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Typical Measured Performance on Demonstration Board 10.7Gb/s 2^31-1, Vdd=5V CPC=50% Vo=6V Vo=5V Vo=4V Vo=3V Input Signal Vin=500mV Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 10 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Typical Bias Conditions Vdd=5V Vo(V) 6 5 4 3 Vg1(V) -0.66 -0.66 -0.66 -0.66 Vg2(V) -0.57 -0.59 -0.67 -0.74 Id 221 198 172 147 Vctrl2 +0.22 +0.04 -0.14 -0.34 Notes: 1. Vdd=5V, Id1=65mA, and Vctrl1=-0.2V 2. Vin=500mVpp 3. 50%CPC Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 11 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU Bias Procedure Vdd=5V, Vo=6Vamp, CPC=50% Bias ON Bias OFF 1. Disable the output of the PPG 1. Disable the output of the PPG 2. Set Vd=0V Vctrl1=0V Vctrl2=0 Vg1=0V 2. Set Vctrl2=0V and Vg2=0V 3. Set Vd=0V 3. Set Vg1=-1.5V Vg2=-1.5V Vctrl1=-0.2V 4. Set Vctrl1=0V 4. Increase Vd to 5V observing Id. 5. Set Vg2=0V - Assure Id=0mA 6. Set Vg1=0V 5. Set Vctrl2=+0.2V - Id should still be 0mA 6. Make Vg1 more positive until Idd=65mA. - This is Id1 (current into the first stage) - Typical value for Vg1 is -0.65V 7. Make Vg2 more positive until Idd=220mA. - This sets Id2T to 155mA. - Typical value for Vg2 is -0.55V 8. Enable the output of the PPG. - Set Vin=500mV 9. Output Swing Adjust: Adjust Vctrl2 slightly positive to increase output swing or adjust Vctrl slightly negative to decrease the output swing. - Typical value for Vctrl2 is +0.22V for Vo=6V. 10. Crossover Adjust: Adjust Vg2 slightly positive to push the crossover down or adjust Vg2 slightly negative to push the crossover up. - Typical value for Vg2 is -0.57V to center crossover with Vo=6V. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 12 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com Advance Product Datasheet TGA4953EPU TGA4953 Mechanical Drawing Notes: 1. Dimensions: Inches. Tolerance: Length and Width: +/-.003 inches. Height +/-.006 inches. Adjacent pad to pad spacing: +/- .0002 inches. Pad Size: +/- .001 inches. 2. Surface Mount Interface: Material: RO4003 (thickness=.008 inches), 1/2oz copper (thickness=.0007 inches) Plating Finish: 100-350 microinches nickel underplate, with 5-10 microinches flash gold overplate. Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process specifications. Specifications are subject to change without notice. 13 TriQuint Semiconductor Texas : (972)994 8465 Fax (972)994 8504 Web: www.triquint.com |
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